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<p><a href="http://en.wikipedia.org/wiki/ARM_architecture">http://en.wikipedia.org/wiki/ARM_architecture</a></p>
<h1 class="firstHeading" id="firstHeading" lang="en">ARM architecture</h1>
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ARM architectures
</caption><tbody><tr><td colspan="2"><a class="image" href="http://en.wikipedia.org/wiki/File:ARM_architecture_logo.gif"><img alt="ARM architecture logo.gif" height="95" src="https://beijingoptbbs.oss-cn-beijing.aliyuncs.com/cs/5606289-7d80c459ba9e800b6a11e078a53546ea.gif" width="200"></a><br>
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The ARM logo
</div> </td></tr><tr><th>Designer</th><td><a href="http://en.wikipedia.org/wiki/ARM_Holdings" title="ARM Holdings">ARM Holdings</a></td></tr><tr><th>Bits</th><td><a href="http://en.wikipedia.org/wiki/32-bit" title="32-bit">32-bit</a> or <a class="mw-redirect" href="http://en.wikipedia.org/wiki/64-bit" title="64-bit">64-bit</a></td></tr><tr><th>Introduced</th><td>1985</td></tr><tr><th><a href="http://en.wikipedia.org/wiki/Computer_architecture" title="Computer architecture">Design</a></th><td><a href="http://en.wikipedia.org/wiki/Reduced_instruction_set_computing" title="Reduced instruction set computing">RISC</a></td></tr><tr><th>Type</th><td><a href="http://en.wikipedia.org/wiki/Processor_register" title="Processor register">Register</a>-Register</td></tr><tr><th><a href="http://en.wikipedia.org/wiki/Branch_%28computer_science%29" title="Branch (computer science)">Branching</a></th><td>Condition code</td></tr><tr><th>Open</th><td>Proprietary</td></tr></tbody></table>
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64/32-bit architecture
</caption><tbody><tr><th>Introduced</th><td>2011</td></tr><tr><th>Version</th><td>ARMv8-A</td></tr><tr><th><a href="http://en.wikipedia.org/wiki/Instruction_set" title="Instruction set">Encoding</a></th><td>AArch64/A64 and AArch32/A32 use 32-bit instructions, T32 (Thumb2) uses mixed 16- and 32-bit instructions. ARMv7 <a href="http://en.wikipedia.org/wiki/User_space" title="User space">user-space</a> compatibility<sup class="reference" id="cite_ref-v8arch_1-0"><a href="http://en.wikipedia.org/wiki/ARM_architecture#cite_note-v8arch-1">[1]</a></sup></td></tr><tr><th><a href="http://en.wikipedia.org/wiki/Endianness" title="Endianness">Endianness</a></th><td><a class="mw-redirect" href="http://en.wikipedia.org/wiki/Bi-endian" title="Bi-endian">Bi</a> (Little as default)</td></tr><tr><th>Extensions</th><td>All mandatory: <a class="mw-redirect" href="http://en.wikipedia.org/wiki/Thumb-2" title="Thumb-2">Thumb-2</a>, <a class="mw-redirect" href="http://en.wikipedia.org/wiki/NEON_%28instruction_set%29" title="NEON (instruction set)">NEON</a>,<a href="http://en.wikipedia.org/wiki/Jazelle" title="Jazelle">Jazelle</a>, VFPv4-D16, VFPv4</td></tr><tr><th colspan="2"><a href="http://en.wikipedia.org/wiki/Processor_register" title="Processor register">Registers</a></th></tr><tr><th><a class="mw-redirect" href="http://en.wikipedia.org/wiki/General_purpose_register" title="General purpose register">General purpose</a></th><td>31x 64-bit integer registers<sup class="reference" id="cite_ref-v8arch_1-1"><a href="http://en.wikipedia.org/wiki/ARM_architecture#cite_note-v8arch-1">[1]</a></sup> plus PC and SP, ELR, SPSR for exception levels</td></tr><tr><th><a href="http://en.wikipedia.org/wiki/Floating_point" title="Floating point">Floating point</a></th><td>32× <a href="http://en.wikipedia.org/wiki/128-bit" title="128-bit">128-bit</a> registers,<sup class="reference" id="cite_ref-v8arch_1-2"><a href="http://en.wikipedia.org/wiki/ARM_architecture#cite_note-v8arch-1">[1]</a></sup>scalar 32- and 64-bit <a class="mw-redirect" href="http://en.wikipedia.org/wiki/IEEE_754" title="IEEE 754">FP</a>,<a href="http://en.wikipedia.org/wiki/SIMD" title="SIMD">SIMD</a> 64- and 128-bit FP and integer</td></tr></tbody></table>
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32-bit architectures (Cortex)
</caption><tbody><tr><th>Version</th><td>ARMv8-R, ARMv7-A, ARMv7-R, ARMv7E-M, ARMv7-M, ARMv6-M</td></tr><tr><th><a href="http://en.wikipedia.org/wiki/Instruction_set" title="Instruction set">Encoding</a></th><td>32-bit except Thumb2 extensions use mixed 16- and 32-bit instructions.</td></tr><tr><th><a href="http://en.wikipedia.org/wiki/Endianness" title="Endianness">Endianness</a></th><td><a class="mw-redirect" href="http://en.wikipedia.org/wiki/Bi-endian" title="Bi-endian">Bi</a> (Little as default)</td></tr><tr><th>Extensions</th><td><a class="mw-redirect" href="http://en.wikipedia.org/wiki/Thumb-2" title="Thumb-2">Thumb-2</a> (mandatory since ARMv7), <a class="mw-redirect" href="http://en.wikipedia.org/wiki/NEON_%28instruction_set%29" title="NEON (instruction set)">NEON</a>, <a href="http://en.wikipedia.org/wiki/Jazelle" title="Jazelle">Jazelle</a>, FPv4-SP</td></tr><tr><th colspan="2"><a href="http://en.wikipedia.org/wiki/Processor_register" title="Processor register">Registers</a></th></tr><tr><th><a class="mw-redirect" href="http://en.wikipedia.org/wiki/General_purpose_register" title="General purpose register">General purpose</a></th><td>16x 32-bit integer registers including PC and SP</td></tr><tr><th><a href="http://en.wikipedia.org/wiki/F |
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